PIC16C62B/72A
DS35008B-page 114
Preliminary
1999 Microchip Technology Inc.
ANDLW ...................................................................... 69
ANDWF ...................................................................... 69
CALL .......................................................................... 70
CLRF ......................................................................... 70
CLRW ......................................................................... 70
COMF ........................................................................ 71
DECF ......................................................................... 71
DECFSZ .................................................................... 71
GOTO ........................................................................ 71
INCF .......................................................................... 71
INCFSZ ...................................................................... 71
IORLW ....................................................................... 72
IORWF ....................................................................... 72
MOVF ........................................................................ 72
MOVWF ..................................................................... 72
NOP ........................................................................... 72
RETFIE ...................................................................... 73
RETLW ...................................................................... 73
RLF ............................................................................ 73
RRF ........................................................................... 73
SLEEP ....................................................................... 73
SUBLW ...................................................................... 74
SWAPF ...................................................................... 74
XORWF ..................................................................... 74
Summary Table ......................................................... 68
INTCON Register .......................................................... 9
, 13
PEIE Bit ..................................................................... 13
, 21
T0IE Bit ...................................................................... 13
, 62
A/D Conversion Complete ......................................... 51
Block Diagram ........................................................... 62
Capture Complete (CCP) ........................................... 34
Interrupt on Change (RB7:RB4 ) ............................... 21
RB0/INT Pin, External ........................................... 6
, 63
SSP Receive/Transmit Complete .............................. 39
TMR0 Overflow ................................................... 26
, 63
TMR1 Overflow ................................................... 27
, 29
TMR2 to PR2 Match (PWM) ............................... 31
, 36
Interrupts, Context Saving During ...................................... 63
Interrupts, Enable Bits
A/D Converter Enable (ADIE Bit) ............................... 14
Global Interrupt Enable (GIE Bit) ........................ 13
, 62
Interrupt on Change (RB7:RB4)
, 63
Peripheral Interrupt Enable (PEIE Bit) ....................... 13
TMR0 Overflow Enable (T0IE Bit) ............................. 13
TMR1 Overflow Enable (TMR1IE Bit) ....................... 14
TMR2 to PR2 Match Enable (TMR2IE Bit) ................ 14
Interrupts, Flag Bits
A/D Converter Flag (ADIF Bit) .............................15
, 51
CCP1 Flag (CCP1IF Bit) .............................. 15
Interrupt on Change (RB7:RB4)
SSP Flag (SSPIF Bit) ................................................ 15
TMR0 Overflow Flag (T0IF Bit) ...........................13
, 63
TMR1 Overflow Flag (TMR1IF Bit) ............................ 15
TMR2 to PR2 Match Flag (TMR2IF Bit) .................... 15
K
KeeLoq
Evaluation and Programming Tools .................. 78
M
Master Clear (MCLR) .......................................................... 6
MCLR Reset, Normal Operation .................. 57
MCLR Reset, SLEEP ................................... 57
Memory Organization
Program Memory ......................................................... 7
MPLAB Integrated Development Environment Software .. 75
O
OPCODE Field Descriptions ............................................. 67
, 12
, 25
, 25
, 25
, 25
OSC1/CLKIN Pin ................................................................. 6
Oscillator Configuration ...............................................55
, 56
HS .......................................................................56
, 60
LP ........................................................................56
, 60
Selection (FOSC1:FOSC0 Bits).................................. 55
, 60
, 29
P
Packaging ........................................................................ 105
Paging, Program Memory .............................................7
, 17
, 60
PICDEM-1 Low-Cost PICmicro Demo Board .................... 77
PICDEM-2 Low-Cost PIC16CXX Demo Board ................. 77
PICDEM-3 Low-Cost PIC16CXXX Demo Board ............... 77
PICSTART
Plus Entry Level Development System ........ 77
PIE1 Register ..............................................................10
, 14
Pinout Descriptions
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